From Harvard to von Neumann The CPU initially had Harvard architecture; with a RAM for data and a ROM for instructions. During the process of development I figured that both of these memories are more or less acting like local cache for the actual memory. Since each memory responds in 1 clock cycle. So if …
Some updates about processor! I just finished implementing 67 instructions (not tested all of them obviously!). And these instructions are not covered: floating point stuff Co-processor stuff Atomic Read-Modify-Write BREAK and WAIT Anything Cache related Trap instructions Also, Division is implemented using “/” and “mod”. These are not synthesize-able and also for division I’m not …
Some time ago I made (in VHDL) a rather stupid processor with very limited instruction set which I called pico-CPU. You can find it under pico_CPU folder in pico-CPU repository on github. The point back then was to make something for a course ( the course was called Digital Systems Modeling and Synthesis). Later on i started …